FIG. 6 is a circuit diagram illustrating a prior art switched line phase shifter. In FIG. 7, a switched line phase shifter 700 comprises FETs 3a to 3d, resonant lines 4a to 4d, and transmission lines 6 and 7. The resonant line 4a is connected between a source and a drain of the FET 3a, and the source is connected to an input terminal 1. The resonant circuit 4b is connected between a source of the FET 3a and a drain of the FET 3b, and the drain of the FET 3b is connected to an output terminal 2. The transmission line 6 is serially connected between the drain of the FET 3a and the source of the FET 3b. The resonant circuit 4c is connected between a source and a drain of the FET 3c, and the drain of the FET 3c is connected to the input terminal 1. The resonant circuit 4d is connected between a source and a drain of the FET 3d , and the source of the FET 3d is connected to the output terminal 2. The transmission line 7 is serially connected between the source of the FET 3c and the drain of the FET 3d. Reference numerals 5a to 5d designate gate bias terminals connected to gates of the FETs 3a to 3d, respectively. The transmission line 6 serves as a reference line, and the electrical length of the transmission line 7 is longer than the electrical length of the reference transmission line 6 by a prescribed length. Here, the electrical length of a transmission line corresponds to a difference in phases between an input wave and an output wave which are input to and output from the transmission line, respectively.
A description is given of the operation.
In the switched line phase shifter 700, the FETs 3a to 3d serve as switches operating in accordance with voltages applied to the respective gate bias terminals 5a to 5d, and two signal transmission paths A and B, extending from the input terminal 1 to the output terminal 2 and having different electrical lengths from each other, are selected by on-off control of the switches 3a to 3d. A signal input to the input terminal 1 is transmitted through the reference transmission line 6, i.e., the signal transmission path A, or the transmission line 7 the electrical length of which is longer than the electrical length of the transmission line 6, i.e., the signal transmission path B, to reach the output terminal 2. Thus, signals input to the input terminal 1 are output as signals having a difference in phases corresponding to the difference in electrical lengths between the two signal transmission paths 6 and 7, resulting in a prescribed phase-shift quantity. When the signal transmission path A is selected, the FETs 3a and 3b are turned on while the FETs 3c and 3d are turned off. When the signal transmission path B is selected, the FETs 3a and 3b are turned off while the FETs 3c and 3D are turned on.
When the gate bias voltage is 0 V, the FETs 3a to 3d are in the on state, and when the gate bias voltage is lower than a pinch-off voltage, they are in the off state. When the FETs 3a to 3d are in the on state, a region between source and drain of each FET has a resistance below several ohms, and the FET functions as a low resistance element. When the FETs are in the off state, a region between source and drain of each FET is equivalent to a parallel circuit comprising a resistance of several kilo-ohms and a capacitance (CT), and the capacitance resonates with the resonant line connected between the source and drain of the FET, which means that the FET functions as a capacitor.
However, when a plurality of phase-shift quantities are to be obtained using the conventional switched line phase shifter, a plurality of phase shifters which provide different phase-shift quantities are connected in series according to the number of desired phase-shift quantities as shown in FIG. 7. In FIG. 7, reference numeral 800 designates a multiple bit phase shifter. Numerals 20 to 24 designate switched line phase shifters and numerals 19 designate connecting terminals. Degrees in each block of switched line phase shifter represent phase differences between an input signal and an output signal when the respective phase shifter is used independently. In the conventional multiple bit phase shifter 800, since only one phase-shift quantity is obtained from each of the phase shifters 20 to 24, as many switched line phase shifted as desired phase-shift quantities are required, resulting in an increase in production cost. In addition, the chip size of the multiple bit phase shifter 800 is significantly increased.